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Product Management Engineer
at Xilinx, inc.
Xilinx is looking for a world class Senior Applications Engineer to help us build and support the next-generation, parallel programming environment for the newly announced Versal, the industry's first adaptive compute acceleration platform (ACAP). Versal devices combine processors, FPGA fabric and new AI engines to deliver powerful heterogeneous acceleration for any application.
As a senior member of the team, you will be responsible for driving the features, methodology and collateral around the software development flow for Versal, with a particular focus on the AI Engines, an array of VLIW SIMD high-performance processors optimized for compute-intensive applications like 5G cellular and machine learning DNN/CNN. You will be working in a broad area collaborating with software development and marketing to help guide the development of the Versal AI Engine tool flow and its integration with Xilinx's Vivado and SDx FPGA design tools. You will also be working with customers and helping them with the successful adoption of this flow. You will get a chance to tackle cutting-edge problems supporting tools for heterogeneous multicore systems.
Your passion for advancing development tools and methodologies for heterogenous computing will make the difference.
- Driving successful adoption of Xilinx AI Engine tool flows
- Drive the evolution of tools and features related to the Xilinx AI Engine flows in Vivado by collaborating with engineering and helping drive tool features
- Drive the best of class methodologies to support the integration of Xilinx AI Engine with Programmable Logic (FPGA)
- Provide Technical expertise to the field and customers, including creating tutorials, and user guides.
- Provide post-sales support, including lab debug, performance analysis, software and hardware programming, and power analysis for high profile customer engagements
- Create designs to demonstrate Xilinx's values on silicon, IP targeting Xilinx's AI Engine
- 5 years of industry experience with FPGA programming, optimization and debug techniques
- Experience using Xilinx's IP Integrator tool to create designs and familiarity with techniques to close timing on these designs
- Experience with programming and scripting skills around C, C , Python
- Prior experience in DSP programming is a plus
- Prior experience with any of the following paradigms is a plus : multi-core architectures, parallel programming, energy-efficient architecture, and VLSI design
- Prior experience with explaining and evangelizing advanced technical systems is a plus
- Experience with Jupyter Notebooks a plus
- Excellent written and verbal communication skills, presentations skills, and the ability to work with multiple groups
- BS/MS (Masters Degree preferred) in CS/EE with a minimum of 5 years' experience developing/supporting FPGA programming, optimization and debug techniques.